sfx2000
Part of the Furniture
For example the TILE has low internal latency from the NIC all the way to the CPU. Same with PCIe ports connected to the CPU as well (one good thing about some of the SoCs in routers too). In epyc, the PCIe ports are directly connected to the CPU but intel's xeon/high performance equivalent have some PCIe ports on CPU, some on chipset and its very confusing as well.
Plenty of differences, and latency actually doesnt matter internally because of the way routing works, pushing those packets only requires internal bandwidth more than latency, but latency from any recent x86 far outclasses the smaller SoCs like ARM and MIPS. Clocks arent everything too as i was saying. LTT has been using servers with manycore many CPU xeons at 2+ghz pushing multiple 10Gbe for purposes of storage, video editing and so on.
In a router/switch, there's more than just the CPU... in an ideal solution, the "CPU" provides supervisory purpose only from a kernel perspective - the flow tables for both stateless (packet forwarding) and stateful (NAT, QoS, etc) can and should be done outside of the kernel in user space...
DPDK provides just this - used to be intel centric, but it's now available for other platforms.
BTW - one of the quirks about Epyc is where one has to move data around - it can be worked thru, but if one is not careful, one can have code running on one of the CCX's, accessing memory that is not local to that CCX. Again, that can be fixed, just something to be aware of - applies to more than just networking...