vaboro
Regular Contributor
You had ECC issue when you tried to boot the router after flashing NAND.What ECC?
You had ECC issue when you tried to boot the router after flashing NAND.What ECC?
config MEMORY_SIZE
hex "Physical memory size"
default "0x04000000"
help
This sets the default memory size assumed by your SH kernel. It can
be overridden as normal by the 'mem=' argument on the kernel command
line. If unsure, consult your board specifications or just leave it
as 0x04000000 which was the default value before this became
configurable.
How can it be that the error pops up at exactly above 1GB? It just doesn't seem like an arbitrary location.in address > 1GB i get the error
probably memory works with erorrs
Dont know )How can it be that the error pops up at exactly above 1GB? It just doesn't seem like an arbitrary location.
base_addr = (volatile uint32_t*)DRAM_BASE_NOCACHE;
xprintf("XXX START TEST");
for (test_size = 128*1024*1024; test_size < memsize ; test_size +=4) {
test_addr = (volatile uint32_t*)((uintptr_t)base_addr + test_size);
*test_addr = test_size;
if(test_size%4096 == 0){
xprintf("XXX test_size=%d\n\r", test_size);
}
}
xprintf("XXX START TEST 0");
for (test_size = 128*1024*1024; test_size < memsize ; test_size +=4) {
test_addr = (volatile uint32_t*)((uintptr_t)base_addr + test_size);
if(*test_addr != test_size){
xprintf("XXX ERROR test_size=%d\n\r", test_size);
break;
}
if(test_size%4096 == 0){
xprintf("XXX test_size=%d\n\r", test_size);
}
}
Searching 268587 files for "DRAM_BASE_NOCACHE"
/Volumes/Files/asuswrt-merlin.ng/release/src-rt-5.02hnd/cfe/cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl1_ddr_cinit.c:
523
524 memsize = memsize<<17;
525: base_addr = (uint32*)DRAM_BASE_NOCACHE;
526
527 for (test_size = 256; test_size < memsize ; test_size = test_size << 1) {
...
969 {
970 uint32_t val = 0, i;
971: uint32_t* addr = (uint32*)DRAM_BASE_NOCACHE, *temp;
972
973 for( temp = addr, i = 0; i < 1024; i++ )
/Volumes/Files/asuswrt-merlin.ng/release/src-rt-5.02hnd/cfe/cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl2_ddr_cinit.c:
280
281 memsize = memsize<<17;
282: base_addr = (volatile uint32_t*)DRAM_BASE_NOCACHE;
283
284 for (test_size = 256; test_size < memsize ; test_size = test_size << 1) {
...
310 uint32_t data;
311
312: addr = (volatile uint32_t*)DRAM_BASE_NOCACHE;
313 for( temp = addr, i = 0; i < 1024; i++ )
314 *temp++ = i;
...
1052 params.edis_info = 1;
1053 params.mem_test_size_bytes = SHMOO_TEST_SIZE; // test size for SHMOO
1054: params.phys_mem_test_base = DRAM_BASE_NOCACHE; // test physical address base for SHMOO
1055 params.phys_memc_reg_base = (MEMC_BASE);
1056 params.phys_phy_reg_base = ((uint32_t)((uintptr_t)&MEMC->PhyControl));
/Volumes/Files/asuswrt-merlin.ng/release/src-rt-5.02hnd/cfe/cfe/arch/mips/board/bcm63xx_rom/src/bcm63xx_impl1_ddr_cinit.c:
665 uint32_t options = 0;
666 uint32_t* temp;
667: uint32_t* addr = (uint32_t*)DRAM_BASE_NOCACHE;
668 int i;
669
/Volumes/Files/asuswrt-merlin.ng/release/src-rt-5.02hnd/cfe/cfe/board/bcm63xx_rom/src/bcm63xx_main.c:
174 int res = 0;
175
176: mem_base = (uint32*)DRAM_BASE_NOCACHE;
177
178 *mem_base = 0;
/Volumes/Files/asuswrt-merlin.ng/release/src-rt-5.02hnd/shared/opensource/include/bcm963xx/bcm_hwdefs.h:
73 */
74 #define DRAM_BASE PHYS_DRAM_BASE
75: #define DRAM_BASE_NOCACHE PHYS_DRAM_BASE
76 #else
77 #define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
78: #define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
79 #endif
80 /* Binary images are always built for a standard MIPS boot address */
/Volumes/Files/asuswrt-merlin.ng/release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/bcm96345/include/board.h:
75 /*****************************************************************************/
76 #define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
77: #define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
78 #define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
79
/Volumes/Files/asuswrt-merlin.ng/release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/bcm9635x/include/board.h:
46 /*****************************************************************************/
47 #define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
48: #define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
49 #define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
50 #define BCM42xx_BASE (0xA0000000 | PHYS_BCM42xx_BASE)
/Volumes/Files/asuswrt-merlin.ng/release/src-rt-7.x.main/src/cfe/cfe/arch/mips/board/bcm96345/include/board.h:
75 /*****************************************************************************/
76 #define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
77: #define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
78 #define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
79
/Volumes/Files/asuswrt-merlin.ng/release/src-rt-7.x.main/src/cfe/cfe/arch/mips/board/bcm9635x/include/board.h:
46 /*****************************************************************************/
47 #define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
48: #define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
49 #define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
50 #define BCM42xx_BASE (0xA0000000 | PHYS_BCM42xx_BASE)
13 matches across 9 files
Compiled CFE with 2GB support
DDR test successfully but linux not started, without any error
modification
Code:git diff ../../../cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl2_ddr_cinit.c diff --git a/release/src-rt-5.02hnd/cfe/cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl2_ddr_cinit.c b/release/src-rt-5.02hnd/cfe/cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl2_ddr_cinit.c index 4dcc9096d1..130b01ac18 100644 --- a/release/src-rt-5.02hnd/cfe/cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl2_ddr_cinit.c +++ b/release/src-rt-5.02hnd/cfe/cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl2_ddr_cinit.c @@ -641,7 +641,7 @@ static void init_memc_dram_profile(unsigned int* pMCB) memc_dram_profile.ddr_2T_mode = (pMCB[MCB_2T_MODE_WORD] & MCB_2T_MODE_MASK) >> MCB_2T_MODE_SHIFT; memc_dram_profile.ddr_hdp_mode = (memc_dram_profile.total_width_bits == 16); memc_dram_profile.large_page = 1; - memc_dram_profile.ddr_dual_rank = 0; + memc_dram_profile.ddr_dual_rank = (memc_dram_profile.total_size_Mbits == 16384) ? 1: 0; memc_dram_profile.timing_cfg.tRAS = (pMCB[MCB_TIMING0_WORD] & MCB_TIMING0_tRAS_MASK) >> MCB_TIMING0_tRAS_SHIFT; memc_dram_profile.timing_cfg.tCwl = (pMCB[MCB_TIMING1_WORD] & MCB_TIMING1_tCWL_MASK) >> MCB_TIMING1_tCWL_SHIFT; git diff ../../../cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl2_ddr_mcb.c diff --git a/release/src-rt-5.02hnd/cfe/cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl2_ddr_mcb.c b/release/src-rt-5.02hnd/cfe/cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl2_ddr_mcb.c index 6115960910..2c518869a6 100644 --- a/release/src-rt-5.02hnd/cfe/cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl2_ddr_mcb.c +++ b/release/src-rt-5.02hnd/cfe/cfe/arch/arm/board/bcm63xx_rom/src/bcm63xx_impl2_ddr_mcb.c @@ -125,6 +125,11 @@ mcbindex MCB[] = { BP_DDR_SPEED_MASK | BP_DDR_TOTAL_SIZE_MASK | BP_DDR_DEVICE_WIDTH_MASK | BP_DDR_TOTAL_WIDTH_MASK | BP_DDR_SSC_CONFIG_MASK, mcb_4908A_800MHz_16b_dev8Gx16_DDR3_1600K_ssc_1per }, + { + BP_DDR_SPEED_800_11_11_11 | BP_DDR_TOTAL_SIZE_2048MB| BP_DDR_DEVICE_WIDTH_16 | BP_DDR_TOTAL_WIDTH_16BIT | BP_DDR_SSC_CONFIG_1, + BP_DDR_SPEED_MASK | BP_DDR_TOTAL_SIZE_MASK | BP_DDR_DEVICE_WIDTH_MASK | BP_DDR_TOTAL_WIDTH_MASK | BP_DDR_SSC_CONFIG_MASK, + mcb_4908A_800MHz_16b_dev8Gx16_DDR3_1600K_ssc_1per + }, { BP_DDR_SPEED_800_11_11_11 | BP_DDR_TOTAL_SIZE_1024MB| BP_DDR_DEVICE_WIDTH_16 | BP_DDR_TOTAL_WIDTH_32BIT | BP_DDR_SSC_CONFIG_1, BP_DDR_SPEED_MASK | BP_DDR_TOTAL_SIZE_MASK | BP_DDR_DEVICE_WIDTH_MASK | BP_DDR_TOTAL_WIDTH_MASK | BP_DDR_SSC_CONFIG_MASK,
OUTPUT
Code:---- BTRM V1.6 CPU0 L1CD MMUI MMU7 DATA ZBBS MAIN OTP? OTPP USBT NAND IMG? IMGL UHD? UHDP RLO? RLOP UBI? UBIP PASS ---- HELO 1.23-1.0.38-161.122 CPU0 L1CD MMUI MMU8 CODE ZBBS MAIN NVRAM memcfg 0x1627 MCB chksum 0xa8b35841, config 0x1627 MemsysInit lpf0_generic_aarch64 1.3.0.1 20150910 DDR3 90001328 80018000 8001A000 00000000 00000000 0060371A MCB rev=0x00040301 Ref ID=0x0371A Sub Bld=0x006 Dram Timing 11-11-11 DDR3-1600 CL11 total 2048MB 1 16bits part[s] %1 SSC Add/Ctl Alignment no adjustment ZQ Cal LP PHY R in Ohm P: Finger=0x2D0 Term=0x78 Drv=0x2A N: Finger=0x2D0 Term=0x78 Drv=0x2A PLL Ref(Hz)=0x02FAF080 UI STEPS=0x03A DDR CLK(MHz)=0x31B WL CLK dly(ps)=0x0C8 bitT(ps)=0x274 VDLsize(fs)=0x2A4B CLK_VDL=0x01A SHMOO 28nm 8001A000 80018800 00000000 00020000 00000000 Shmoo WL One UI Steps : 0x45 auto-clk result = 00E (filter=0C steps) initial CLK shift = 01A final CLK shift = 00E 000000000011111111112222222222333333333344444444445555555555666666666 012345678901234567890123456789012345678901234567890123456789012345678 00 S-----------X+++++++++++++++++++++++++++++++++++++++++++++++++++++++- 01 S------------------------X+++++++++++++++++++++++++++++++++++++++++++ Shmoo RD En FORCED WR ODT = 0x18001800 DQSN DRIVE PAD CONTROL (from) (to) B0 00031A31 00079A31 B1 00031A31 00079A31 B0 RISE UI=1 VDL=2B PICK UI=2 VDL=2B B1 RISE UI=1 VDL=15 PICK UI=2 VDL=15 000000000011111111112222222222333333333344444444445555555555666666666 012345678901234567890123456789012345678901234567890123456789012345678 00 --S----------------------------------------X+++++++++++++++++++++++++ Shmoo RD DQ NP DQS : B0 VDL=3A ok B1 VDL=3A ok 000000000011111111112222222222333333333344444444445555555555666666666 012345678901234567890123456789012345678901234567890123456789012345678 00 ---+++++++++++++++++++++++X++++++++++++++++++++++++------------------ Shmoo RD DQ P 000000000011111111112222222222333333333344444444445555555555666666666 012345678901234567890123456789012345678901234567890123456789012345678 00 --++++++++++++++++++++++++X+++++++++++++++++++++++++----------------- 01 ------+++++++++++++++++++++++X++++++++++++++++++++++++--------------- 02 --++++++++++++++++++++++++X+++++++++++++++++++++++++----------------- Shmoo RD DQ N 000000000011111111112222222222333333333344444444445555555555666666666 012345678901234567890123456789012345678901234567890123456789012345678 00 ---+++++++++++++++++++++++++X+++++++++++++++++++++++++--------------- 01 ------+++++++++++++++++++++++++X++++++++++++++++++++++++++----------- RD DQS adjustments : BL0: Start: 0x3A Final: 0x3A BL1: Start: 0x3A Final: 0x3A Shmoo WR DQ 000000000011111111112222222222333333333344444444445555555555666666666 012345678901234567890123456789012345678901234567890123456789012345678 00 ---+++++++++++++++++++++++X+++++++++++++++++++++++------------------- 01 ------++++++++++++++++++++++++X++++++++++++++++++++++++-------------- Shmoo WR DM WR DM 000000000011111111112222222222333333333344444444445555555555666666666 012345678901234567890123456789012345678901234567890123456789012345678 00 ------++++++++++++++++++++++++++X++++++++++++++++++++++++++---------- 01 --+++++++++++++++++++++++++++X+++++++++++++++++++++++++++------------ DDR test done successfully FPS0 ---- PAR0 J026 JFFS BT26 0008 ---- PAR1 J025 JFFS BT25 0768 ---- TRY0 NAN3 JFS2 RFS1 JFFS JFS2 NAN5 Base: 1.2_3 CFE version 1.0.38-161.122 for BCM94908 (64bit,SP,LE) Build Date: Thu 01 Apr 2021 12:25:07 PM EDT (evg@evgasus) Copyright (C) 2000-2015 Broadcom Corporation. Boot Strap Register: 0x6fc42 Chip ID: BCM4906_A0, Broadcom B53 Quad Core: 1800MHz Total Memory: 2147483648 bytes (2048MB) Status wait timeout: nandsts=0x50000000 mask=0x40000000, count=0 NAND ECC BCH-4, page size 0x800 bytes, spare size used 64 bytes NAND flash device: , id 0xc2da block 128KB size 262144KB pmc_init:PMC using DQM mode pmc_init slow 95, fast 70 pmc_init:7 0 264047c 33a0337 nand_flash_read_buf(): Attempt to read bad nand block 1992 nand_flash_read_buf(): Attempt to read bad nand block 1992 nand_flash_read_buf(): Attempt to read bad nand block 1992 Skip Rescue Mode Board IP address : 192.168.1.1:ffffff00 Host IP address : 192.168.1.100 Gateway IP address : Run from flash/host/tftp (f/h/c) : f Default host run file name : vmlinux Default host flash file name : bcm963xx_fs_kernel Boot delay (0-9 seconds) : 1 Boot image (0=latest, 1=previous) : 0 Default host ramdisk file name : Default ramdisk store address : Default DTB file name : Board Id : 94906REF Number of MAC Addresses (1-64) : 10 Base MAC Address : 04:d4:c4:1b:1f:48 PSI Size (1-128) KBytes : 128 Enable Backup PSI [0|1] : 0 System Log Size (0-256) KBytes : 0 Auxillary File System Size Percent: 0 flow memory allocation (MB) : 14 buffer memory allocation (MB) : 32 DHD 0 memory allocation (MB) : 0 DHD 1 memory allocation (MB) : 14 DHD 2 memory allocation (MB) : 0 WLan Feature : 0x00 Partition 1 Size (MB) : 8M Partition 2 Size (MB) : 48M Partition 3 Size (MB) : 0M Partition 4 Size (MB) (Data) : 8M Initalizing switch low level hardware. pmc_switch_power_up: Rgmii Tx clock zone1 enable 1 zone2 enable 1. Software Resetting Switch ... Done. Waiting MAC port Rx/Tx to be enabled by hardware ...Done Disable Switch All MAC port Rx/Tx *** Press any key to stop auto run (1 seconds) *** Auto run second count down: 0 Booting from latest image (address 0x00100000, flash offset 0x00100000) ... Decompression LZMA Image OK! Entry at 0x0000000000080000 Starting program at 0x0000000000080000 /memory = 0x80000000
rm -rf asuswrt-merlin.ng-build
cp -a asuswrt-merlin.ng/ asuswrt-merlin.ng-build
# fix symlinks for HND toolchain
rm -rf ~/asuswrt-merlin.ng-build/release/src-rt-5.02hnd/bcmdrivers/broadcom/net/wl/impl51/main/src/toolchains
ln -s ~/am-toolchains/brcm-arm-hnd ~/asuswrt-merlin.ng-build/release/src-rt-5.02hnd/bcmdrivers/broadcom/net/wl/impl51/main/src/toolchains
# fix symlinks for ARM toolchain
rm -rf ~/asuswrt-merlin.ng-build/release/src-rt-6.x.4708/toolchains
ln -s ~/am-toolchains/brcm-arm-sdk ~/asuswrt-merlin.ng-build/release/src-rt-6.x.4708/toolchains
export LD_LIBRARY_PATH=/opt/toolchains/crosstools-arm-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/lib
export TOOLCHAIN_BASE=/opt/toolchains
echo $PATH | grep -qF /opt/toolchains/crosstools-arm-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin || export PATH=$PATH:/opt/toolchains/crosstools-arm-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin
echo $PATH | grep -qF /opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin || export PATH=$PATH:/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin
cd ~/asuswrt-merlin.ng-build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom
export BRCM_CHIP=4908
export BRCM_VERSION="1"
export BRCM_RELEASE="2"
export BRCM_EXTRAVERSION="\"3\""
make BRCM_CHIP=4908 BLD_NAND=1
ls -la cfe4908rom.bin
ls -la ../bcm63xx_ram/cfe4908.bin
ls -la ../bcm63xx_ram/cfe4908ram.bin
Very Helpful, but i still meet some error.Build CFE
Code:rm -rf asuswrt-merlin.ng-build cp -a asuswrt-merlin.ng/ asuswrt-merlin.ng-build # fix symlinks for HND toolchain rm -rf ~/asuswrt-merlin.ng-build/release/src-rt-5.02hnd/bcmdrivers/broadcom/net/wl/impl51/main/src/toolchains ln -s ~/am-toolchains/brcm-arm-hnd ~/asuswrt-merlin.ng-build/release/src-rt-5.02hnd/bcmdrivers/broadcom/net/wl/impl51/main/src/toolchains # fix symlinks for ARM toolchain rm -rf ~/asuswrt-merlin.ng-build/release/src-rt-6.x.4708/toolchains ln -s ~/am-toolchains/brcm-arm-sdk ~/asuswrt-merlin.ng-build/release/src-rt-6.x.4708/toolchains export LD_LIBRARY_PATH=/opt/toolchains/crosstools-arm-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/lib export TOOLCHAIN_BASE=/opt/toolchains echo $PATH | grep -qF /opt/toolchains/crosstools-arm-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin || export PATH=$PATH:/opt/toolchains/crosstools-arm-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin echo $PATH | grep -qF /opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin || export PATH=$PATH:/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin cd ~/asuswrt-merlin.ng-build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom export BRCM_CHIP=4908 export BRCM_VERSION="1" export BRCM_RELEASE="2" export BRCM_EXTRAVERSION="\"3\"" make BRCM_CHIP=4908 BLD_NAND=1 ls -la cfe4908rom.bin ls -la ../bcm63xx_ram/cfe4908.bin ls -la ../bcm63xx_ram/cfe4908ram.bin
docker@6629d9866e60:/build/release/src-rt-5.02hnd/$ make rt-ac86u
docker@6629d9866e60:/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom$ export
declare -x BRCM_CHIP="4908"
declare -x BRCM_EXTRAVERSION="3"
declare -x BRCM_RELEASE="2"
declare -x BRCM_VERSION="1"
declare -x LD_LIBRARY_PATH=":/opt/toolchains/crosstools-arm-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/lib"
declare -x PATH="/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/opt/toolchains/crosstools-arm-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin:/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin"
declare -x TOOLCHAIN_BASE="/opt/toolchains"
docker@6629d9866e60:/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom$ make BRCM_CHIP=4908 BLD_NAND=1
echo "char *_binArrayStart = (char *) 0, *_binArrayEnd = (char *) 0;" > noflashimg.c;
/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/aarch64-buildroot-linux-gnu-gcc -I. -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/arch/arm/common/include -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/arch/arm/cpu/armv8/include -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/board/bcm63xx_rom/include -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/board/common/include -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/arch/arm/board/bcm63xx_rom/include -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/arch/arm/board/bcm63xx_shared/include -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/include -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/pci -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/net -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/board/bcm63xx_ram/include -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../../shared/opensource/include/bcm963xx -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../../shared/broadcom/include/bcm963xx -I../../../cfe/sha256 -I../../../cfe/aes128 -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../../shared/opensource/include/bcm963xx/../pmc -I/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../../shared/opensource/include/bcm963xx/../rdp -D_CFE_ -DCFE_VER_MAJ=1 -DCFE_VER_MIN=0 -DCFE_VER_ECO=38 -DCFG_BOARDNAME=\""BCM94908"\" -DBRCM_VERSION="\"1\"" -DBRCM_RELEASE="\"2\"" -DBRCM_EXTRAVERSION="\"3\"" -DCFE_VER_MAJ_STR="\"1\"" -DCFE_VER_MIN_STR="\"0\"" -DCFE_VER_ECO_STR="\"38\"" -DCFE_MAJOR_STR="\"161\"" -DCFE_MINOR_STR="\"122\"" -fdata-sections -ffunction-sections -DCFE_ABORT_KEY=1 -DINC_BTRM_BOOT=0 -DINC_BTRM_BUILD=0 -DINC_CFI_FLASH_DRIVER=0 -DINC_SPI_FLASH_DRIVER=0 -DINC_NAND_FLASH_DRIVER=1 -DINC_SPI_PROG_NAND=0 -DINC_SPI_NAND_DRIVER=1 -DINC_PMC_DRIVER=1 -DCFG_COPY_PSRAM=0 -DCFG_BOOT_PSRAM=0 -DCFG_ROM_PRINTF=1 -DBOOT_PRE_CFE=0 -DCONFIG_ARM64 -DCFG_ARMV8_AARCH64 -march=armv8-a -mtune=cortex-a53 -mstrict-align -D__ARMEL__ -DCFG_ZLIB=1 -DMY_ZCALLOC -DNO_MEMCPY -gdwarf-2 -c -fno-builtin -ffreestanding -Wall -Werror -Wstrict-prototypes -fno-stack-protector -fno-delete-null-pointer-checks -Wframe-larger-than=2560 -Os -mabi=lp64 -D__long64 -DCFG_BOOTRAM=0 -D_BCM94908_ -o noflashimg.o noflashimg.c
make -C ../bcm63xx_ram
make[1]: Entering directory '/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram'
make -C ../../../../hostTools build_cmplzma
make[2]: Entering directory '/build/release/src-rt-5.02hnd/hostTools'
if [ ! -e lzma457/lzma.txt ]; then \
echo Untarring lzma 4.57 source...; \
(tar xkfj lzma457.tar.bz2 2> /dev/null || true); \
fi
building lzma host tool ...
make -C /build/release/src-rt-5.02hnd/hostTools/lzma457/CPP/7zip/Compress/LZMA_Alone -f makefile.gcc
make[3]: Entering directory '/build/release/src-rt-5.02hnd/hostTools/lzma457/CPP/7zip/Compress/LZMA_Alone'
make[3]: Nothing to be done for 'all'.
make[3]: Leaving directory '/build/release/src-rt-5.02hnd/hostTools/lzma457/CPP/7zip/Compress/LZMA_Alone'
cp -f /build/release/src-rt-5.02hnd/hostTools/lzma457/CPP/7zip/Compress/LZMA_Alone/lzma lzmacmd
g++ -O2 -DGNU -I/bcm963xx -I/bcm963xx -I. -c cmplzma.cpp
cmplzma.cpp: In function ‘int main(int, char**)’:
cmplzma.cpp:452:27: warning: ‘%s’ directive writing between 3 and 4 bytes into a region of size between 0 and 255 [-Wformat-overflow=]
452 | sprintf(lzmaFile, "%s.%s", inputBinFile,lz4 ? "lz4":"lzma");
| ^~
In file included from /usr/include/stdio.h:867,
from cmplzma.cpp:74:
/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:34: note: ‘__builtin___sprintf_chk’ output between 5 and 261 bytes into a destination of size 256
36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,
| ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
37 | __bos (__s), __fmt, __va_arg_pack ());
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
g++ -o cmplzma cmplzma.o -lm
make[2]: Leaving directory '/build/release/src-rt-5.02hnd/hostTools'
find ../../../../shared -name "*.o" -exec rm -f "{}" ";"
find ../../../../shared/opensource/boardparms/bcm963xx -name "*.o" -exec rm -f "{}" ";"
make cfe4908
make[2]: Entering directory '/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram'
make[2]: *** No rule to make target 'bcm63xx_devs.o', needed by 'cfe4908'. Stop.
make[2]: Leaving directory '/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram'
make[1]: *** [Makefile:304: ALL] Error 2
make[1]: Leaving directory '/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram'
make: *** [Makefile:258: cfe4908] Error 2
After checkout to Tag "384.19-mainline". Still failed when trying to build CFE binaryon 384.19 work
on new dosnt work
bcm63xx_devs.c - this file dosnt exist at all )))
...
make[2]: *** No rule to make target 'bcm63xx_devs.o', needed by 'cfe4908'. Stop.
...
BSPOBJS += \
dev_bcm63xx_flash.o \
flash_api.o \
flash_common.o \
bcm63xx_devs.o \
bcm63xx_board.o \
bcm63xx_cmd.o \
/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram/../../../cfe/board/bcm63xx_ram/src/bcm63xx_main.c:579: undefined reference to 'board_console_init'
/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram/../../../cfe/board/bcm63xx_ram/src/bcm63xx_main.c:631: undefined reference to 'board_device_init'
/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram/../../../cfe/board/bcm63xx_ram/src/bcm63xx_main.c:637: undefined reference to 'board_final_init'
bcm63xx_httpd.o: In function `cfe_web_fg_process':
/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram/../../../cfe/board/bcm63xx_ram/src/bcm63xx_httpd.c:221: undefined reference to 'softReset'
./libcfe.a(exchandler.o): In function 'cfe_exception':
/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram/../../../cfe/arch/arm/common/src/exchandler.c:142: undefined reference to 'softReset'
make[2]: *** [Makefile:339: cfe4908] Error 1
make[2]: Leaving directory '/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram'
make[1]: *** [Makefile:304: ALL] Error 2
make[1]: Leaving directory '/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram'
make: *** [Makefile:258: cfe4908] Error 2
make cfe4908
make[2]: Entering directory '/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram'
/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/aarch64-buildroot-linux-gnu-gcc -gdwarf-2 -c -fno-builtin -ffreestanding -Wall -Werror -Wstrict-prototypes -fno-stack-protector -fno-delete-null-pointer-checks -Wframe-larger-than=2560 -O0 -mabi=lp64 -D__long64 -DCFG_RAMAPP=1 -I. -I../../../cfe/arch/arm/common/include -I../../../cfe/arch/arm/cpu/armv8/include -I../../../cfe/board/bcm63xx_ram/include -I../../../cfe/board/common/include -I../../../cfe/board/bcm63xx_rom/include -I../../../cfe/arch/arm/board/bcm63xx_ram/include -I../../../cfe/arch/arm/board/bcm63xx_shared/include -I../../../cfe/include -I../../../cfe/pci -I../../../cfe/net -I../../../cfe/fdt -I../../../../shared/opensource/include/bcm963xx -I../../../../shared/broadcom/include/bcm963xx -I../../../../shared/opensource/include/bcm963xx/../pmc -I../../../cfe/sha256 -I../../../cfe/aes128 -I../../../cfe/otp -D_CFE_ -DCFE_VER_MAJ=1 -DCFE_VER_MIN=0 -DCFE_VER_ECO=38 -DCFG_BOARDNAME=\""BCM94908"\" -DCONFIG_MIPS_BRCM -DINC_CFI_FLASH_DRIVER=0 -DINC_SPI_FLASH_DRIVER=0 -DINC_NAND_FLASH_DRIVER=1 -DINC_SPI_PROG_NAND=0 -DINC_SPI_NAND_DRIVER=1 -DINC_BTRM_BOOT=0 -DINC_PMC_DRIVER=1 -DCFG_COPY_PSRAM=0 -DINC_KERMIT=0 -DCFG_BOOT_PSRAM=0 -DNONETWORK=0 -DSKIP_FLASH=0 -DBPCM_CFE_CMD=0 -DCFG_DT -DCFG_TCP -DCFG_WEB_SERVER=1 -fdata-sections -ffunction-sections -DCONFIG_ARM64 -DCFG_ARMV8_AARCH64 -march=armv8-a -mtune=cortex-a53 -mstrict-align -D__ARMEL__ -D_BCM94908_ -D_BUILDDATE_="\"Tue Nov 16 17:32:04 UTC 2021\"" -D_BUILDUSER_="\"docker@6629d9866e60\"" -DBRCM_VERSION=1 -DBRCM_RELEASE=2 -DBRCM_EXTRAVERSION="\"3\"" -DCFG_DTB_IMAGE="\"94908.dtb\"" -o bcm63xx_devs.o ../../../cfe/board/bcm63xx_ram/src/bcm63xx_devs.c
/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/aarch64-buildroot-linux-gnu-ld -o cfe4908 -Map cfe4908.map -g --script ../../../cfe/arch/arm/common/src/cfe_aarch64.lds -Ttext 0x01000000 --gc-sections init_arm_aarch64.o exception_aarch64.o bcm63xx_ipc.o dev_bcm63xx_uart.o bcmSpiRes.o bcmLegSpi.o bcm_pinmux_impl1.o bcm_misc_hw_init_impl6.o bcm_gpio_impl1.o bcm_led_impl1.o bcm_otp_impl1.o pmc_drv.o dev_bcm63xx_eth.o bcm_ethsw_impl1.o pmc_switch.o dev_bcm63xx_flash.o flash_api.o flash_common.o bcm63xx_devs.o bcm63xx_board.o bcm63xx_cmd.o bcm63xx_blparms.o boardparms.o bp_funcs.o boardparms_voice.o shared_utils.o bcm63xx_util.o bcm63xx_ldr_raw.o bcm63xx_ldr_elf.o bcm63xx_main.o bcm63xx_env_subr.o bcm63xx_httpd.o bcm63xx_nvram.o bcm63xx_net_icmp.o bcm_ubi.o bcmHsSpi.o nandflash.o spinandflash.o ul.o ulinfo.o bcm63xx_dtb.o bcm63xx_impl2_common.o bcm63xx_impl2_otp.o bcm63xx_impl2_smp.o bcm63xx_rsa.o bcm63xx_sha.o bcm63xx_auth_if.o bcm63xx_sotp_if.o bcm63xx_potp_sotp_cmd.o -L. -lcfe -L /am-toolchains/brcm-arm-hnd/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/../lib/gcc/aarch64-buildroot-linux-gnu/5.3.0 -lgcc
/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/aarch64-buildroot-linux-gnu-objdump -d cfe4908 > cfe4908.dis
/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/aarch64-buildroot-linux-gnu-objcopy --output-target=binary cfe4908 cfe4908.bin
/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/aarch64-buildroot-linux-gnu-objcopy --output-target=srec --srec-forceS3 -R .reginfo -R .note -R .comment -R .mdebug -S cfe4908 cfe4908.srec
/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/aarch64-buildroot-linux-gnu-objdump -x cfe4908 | ../../../../hostTools/mkCfeHeader cferamhdr.bin
format='elf64-littleaarch64'
start 1000000
load 1000000
sz 58c10
cat cferamhdr.bin cfe4908.bin > cfe4908ram.bin
rm cferamhdr.bin
make[2]: Leaving directory '/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram'
../../../../hostTools/cmplzma -c -2 -lzma cfe4908 cfe4908.bin ../bcm63xx_rom/flashimg.S
using LZMA compression
Code text starts: textAddr=0x01000000 Program entry point: 0x01000000,
../../../../hostTools/lzmacmd e cfe4908.bin cfe4908.bin.lzma -d22 -lp2 -lc1
LZMA 4.57 Copyright (c) 1999-2007 Igor Pavlov 2007-12-06
Before compression: 350146 After compression (level=2): 87144
Percent Compression = 75.11
make[1]: Leaving directory '/build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_ram'
/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/aarch64-buildroot-linux-gnu-ld -o cfe4908rom -Map cfe4908rom.map --gc-sections -g --script /build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/arch/arm/common/src/cfe_aarch64.lds -Ttext 0x90000000 init_arm_aarch64.o exception_aarch64.o bcm63xx_ipc.o nandflash.o bcm_ubi.o bcmSpiRes.o bcmHsSpi.o spinandflash.o bcm_otp_impl1.o bcm63xx_main.o bcm63xx_impl2_rom_boot.o bcm63xx_impl2_ddr_cinit.o bcm63xx_impl2_ddr_mcb.o bcm63xx_impl2_common.o bcm63xx_impl2_otp.o bcm63xx_impl2_smp.o bcm63xx_aes.o bcm63xx_encr_if.o LzmaDecode.o dcapi.o bcm63xx_rsa.o bcm63xx_sha.o bcm63xx_auth_if.o noflashimg.o -L. -lcfe -L /build/release/src-rt-5.02hnd/cfe/build/broadcom/bcm63xx_rom/../../../cfe/arch/arm/board/bcm63xx_rom/src -lmemsysinitlib_impl2 -L /am-toolchains/brcm-arm-hnd/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/../lib/gcc/aarch64-buildroot-linux-gnu/5.3.0 -lgcc
/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/aarch64-buildroot-linux-gnu-objdump -d cfe4908rom > cfe4908.dis
/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/aarch64-buildroot-linux-gnu-objcopy --output-target=binary cfe4908rom cfe4908rom.bin
/opt/toolchains/crosstools-aarch64-gcc-5.3-linux-4.1-glibc-2.22-binutils-2.25/usr/bin/aarch64-buildroot-linux-gnu-objcopy --output-target=srec -R .reginfo -R .note -R .comment -R .mdebug -S cfe4908rom cfe4908.srec
rm noflashimg.*
done
good
git checkout 384.19
work for me
Code:find . -name bcm63xx_devs.c ./asuswrt-merlin.ng/release/src-rt-5.02hnd/cfe/cfe/board/bcm63xx_ram/src/bcm63xx_devs.c
hpo14 @ ~/.../ac86/docker/asuswrt-merlin.ng (build-cfe) $ git tag -l | grep 384.19
384.19
384.19-ax
384.19-beta1
384.19-beta1-ax
384.19-beta1-mainline
384.19-beta2
384.19-beta2-ax
384.19-beta2-mainline
384.19-mainline
hpo14 @ ~/.../ac86/docker/asuswrt-merlin.ng (build-cfe) $ git checkout 384.19
Checking out files: 100% (101458/101458), done.
Note: checking out '384.19'.
...
HEAD is now at 8c72854f4d bump revision to 384.19 final
hpo14 @ ~/.../ac86/docker/asuswrt-merlin.ng ((384.19)) $ find . -iname "bcm63xx_devs.*"
hpo14 @ ~/.../ac86/docker/asuswrt-merlin.ng ((384.19)) $
evg@evgasus:~/asuswrt-merlin.ng$ git status
HEAD detached at 384.19
nothing to commit, working tree clean
evg@evgasus:~/asuswrt-merlin.ng$ find . -name bcm63xx_devs.c
./release/src-rt-5.02hnd/cfe/cfe/board/bcm63xx_ram/src/bcm63xx_devs.c
commit b93cd5bb222db1733668e9d89cfca0153880c0d7 (HEAD, tag: 384.19)
Author: Eric Sauvageau <merlin@asuswrt-merlin.net>
Date: Fri Aug 14 15:09:54 2020 -0400
bump revision to 384.19 final
commit 8c72854f4d1037a5fbab468135143560fee7d80e (HEAD, tag: 384.19)
Author: Eric Sauvageau <merlin@asuswrt-merlin.net>
Date: Fri Aug 14 15:09:54 2020 -0400
bump revision to 384.19 final
new source
Code:commit 8c72854f4d1037a5fbab468135143560fee7d80e (HEAD, tag: 384.19) Author: Eric Sauvageau <merlin@asuswrt-merlin.net> Date: Fri Aug 14 15:09:54 2020 -0400 bump revision to 384.19 final
how is this possible
did the copyright holders delete the source?
$ git log --all | grep -B5 "384.19 final"
commit 8c72854f4d1037a5fbab468135143560fee7d80e
Author: Eric Sauvageau <merlin@asuswrt-merlin.net>
Date: Fri Aug 14 15:09:54 2020 -0400
bump revision to 384.19 final
It's really wired.in this source bcm63xx_devs.c exist ))
Code:https://github.com/RMerl/asuswrt-merlin.ng/tree/b93cd5bb222db1733668e9d89cfca0153880c0d7
I copied the self build CFE binary (cfe4908.bin, cfe4908ram.bin, cfe4908rom.bin) to "targets/cfe/sysdeps/RT-AC86U" to replace the default files.After checkout to Tag "384.19-mainline". Still failed when trying to build CFE binary
....
It seems relation to bcm63xx_devs.c, but there is no bcm63xx_devs.c as you said.
After searches in github, I found bcm63xx_devs.c in this repo blackfuel/asuswrt-rt-ac86u
So, i simply copied bcm63xx_devs.c to "cfe/cfe/board/bcm63xx_ram/src" and revert the change "src-rt-5.02hnd/cfe/cfe/board/bcm63xx_ram/src/Makefile"
And build again.
Dala ~~~~, seems succeed. But I haven't build a full rom with this CFE binary.
I' try to do that later.
make rt-ac86u
with success.LZMA: Prossible old LZMA format, trying to decompress..
RD DQS adjustments :
BL0: Start: 0x51 Final: 0x53
BL1: Start: 0x51 Final: 0x51
Shmoo WR DQ
.........
Shmoo WR DM
WR DM
.........
DDR test done successfully
LZMA: Prossible old LZMA format, trying to decompress..
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